Chips to Start-up (C2S) Programme: Strengthening India’s Chip Design Capabilities
India is rapidly advancing its semiconductor ecosystem as a cornerstone of economic growth, technological independence, and national resilience. With global demand for electronics and AI-driven devices projected to push the semiconductor industry close to USD 1 trillion by 2030, the need for skilled professionals has never been greater. Global estimates indicate a requirement for over one million additional semiconductor experts by 2032, positioning India to play a key role in bridging this talent gap.
Recognising semiconductor design as a national strategic priority, the Ministry of Electronics and Information Technology (MeitY) launched targeted initiatives such as the Chips to Start-up (C2S) Programme and the Design Linked Incentive (DLI) Scheme. These programmes now engage nearly 400 organisations, including 305 academic institutions and 95 startups, to accelerate innovation and build domestic chip design capabilities.
By democratising access to advanced design tools and infrastructure, the C2S Programme empowers students, researchers, and entrepreneurs across India to participate in semiconductor innovation. This initiative supports the vision of technological self-reliance while enhancing global competitiveness.
C2S Programme: Objectives and Structure
Launched in 2022 with an outlay of ₹250 crore over five years, the C2S Programme aims to produce 85,000 industry-ready professionals across undergraduate, postgraduate, and doctoral levels. The initiative includes 200 PhD researchers, 7,000 MTech specialists in VLSI and Embedded Systems, 8,800 MTech graduates from allied disciplines, and 69,000 BTech students trained through VLSI-focused coursework.
Beyond education, the programme targets the incubation of 25 startups, 10 technology transfers, and the generation of at least 50 patents. It also promotes research through over 2,000 publications and provides access to SMART lab facilities nationwide. This integrated approach links academia, industry, and innovation to strengthen India’s position in the global semiconductor value chain.
Hands-On Learning and Implementation
The C2S Programme emphasises experiential learning by giving students access to advanced chip design, fabrication, and testing facilities. Through collaboration with industry partners, participants gain practical exposure to real-world semiconductor workflows, from designing Application-Specific Integrated Circuits (ASICs) to developing Systems-on-Chip (SoCs) and Intellectual Property (IP) cores.
Training is conducted through more than 100 academic institutions and 200 partner organisations. Facilities such as the ChipIN Centre at C-DAC Bengaluru and the SMART Lab at NIELIT Calicut provide essential resources, including high-end Electronic Design Automation (EDA) tools and foundry access through partners like SCL, IMEC, and MUSE Semiconductors.
ChipIN Centre: Driving Innovation and Fabrication
At the heart of the initiative lies the ChipIN Centre, managed by C-DAC Bengaluru. It serves as a national hub offering shared semiconductor design infrastructure and mentoring to over 300 institutions. The Centre consolidates student designs every quarter, verifies them for fabrication readiness, and forwards them to the Semi-Conductor Laboratory (SCL) in Mohali for production using 180 nm technology.
To date, the ChipIN Centre has handled more than 4,800 support requests and facilitated six shared wafer runs, leading to 122 chip submissions from 46 institutions. A total of 56 student-designed chips have been successfully fabricated, packaged, and delivered, marking a milestone in India’s practical chip design capability.
Impact and Achievements
The C2S Programme has trained over 67,000 individuals, with more than one lakh participants enrolled across India. It has also conducted over 265 industry-led training sessions and enabled access to 175 lakh hours of national EDA infrastructure usage. Participating institutions have filed over 75 patents and developed more than 500 IP cores, ASICs, and SoC designs for sectors including defence, telecom, and consumer electronics.
High-performance computing support through the PARAM Utkarsh supercomputer and widespread deployment of FPGA boards have further enhanced research and prototype development capabilities.
Institutional Framework and National Coordination
MeitY provides strategic direction and funding oversight, ensuring collaboration between academic institutions and industry. C-DAC operates the ChipIN Centre and manages design aggregation, while SCL Mohali oversees fabrication and chip delivery. Together, these institutions have built a coordinated framework to expand India’s semiconductor design ecosystem and develop a sustainable pipeline of skilled professionals.
Conclusion
Semiconductors are at the core of global technological progress and economic security. Through the Chips to Start-up Programme, India is creating an environment that fosters innovation, skill development, and technological sovereignty. By equipping a new generation of engineers with the tools and training to design and build chips, the programme is laying the foundation for India’s emergence as a global semiconductor design hub.
with inputs from PIB